Mercurial > libervia-backend

diff frontends/src/bridge/DBus.py @ 1026:71fdc327b318

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core: getReady and asyncConnect now wait full initialisation, not only memory
author Goffi <goffi@goffi.org>
date Thu, 15 May 2014 20:01:56 +0200
parents 7e43ea75cce8
children 15f43b54d697
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