Mercurial > libervia-backend
view .hgignore @ 2086:4633cfcbcccb
bridge (D-Bus): bad design fixes:
- renamed outputed module to dbus_bridge (to avoid uppercase and conflict with dbus module)
- class name is now Bridge for both frontend and core (make discovery/import more easy)
- register renamed to register_method in core, and register_signal in frontend
author | Goffi <goffi@goffi.org> |
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date | Mon, 03 Oct 2016 21:15:39 +0200 |
parents | f2cb99b196b1 |
children | 9f599ccbea4e |
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syntax: glob *.pyc *.pyv *.swp *.swo tags twistd.log twistd.pid bridge_constructor/generated _trial_temp/ sat.egg-info *.un~ dist MANIFEST build ctags_links/ Session.vim